1. Field of the Invention
The present invention relates to semiconductor manufacturing technology; and, more particularly, to an electrostatic discharge (ESD) protection device for protecting an internal circuitry from being damaged during electrostatic discharge, and a method for manufacturing the ESD protection circuit.
2. Description of Related Art
As well known in the art, when a semiconductor integrated circuit is brought to a contact with a human body or machine charged with static electricity, a transient current with high energy is generated while the static electricity charged in the human body or machine is discharged into an internal circuit through an external pin via a pad. The transient current with high energy may severely damage the internal circuitry.
On the contrary, when the static electricity charged in the semiconductor integrated circuit is discharged into the human body or machine due to the contact therebetween, the internal circuitry may also be damaged. To protect a main circuitry from being damaged due to the electrostatic discharge in most semiconductor integrated circuits, an electrostatic discharge (ESD) protection circuit is installed between a pad and a semiconductor internal circuit.
Designing of the ESD protection circuit is achieved by modifying only parameters during a layout design using a standard process. The performance of the ESD protection device is strongly correlated with its size. That is, the ESD protection device should have a predetermined size or greater to improve the performance. For this reason, the ESD protection device occupies a large area in a chip inevitably. Accordingly, a total chip size may depend on how compactly unit ESD protection devices are formed. However, there is a limitation to reduce the total chip size because the total occupation area of the ESD protection devices in the chip is 30% or greater.